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Rome EPYC is in the customer verification phase and will be released on time next year. It has won orders for at least two sets of supercomputers, including 10,000 64 cores in Germany.
Now, for the first time, the engineering sample of Rome EPYC has been exposed, numbered "2S1404E2VJUG5_20/14_N"
2 representativesES1 First Edition Engineering Sample
S represents Sever.The server
- 140 stands for reference frequency 1.4 GHz
- 4 represents the revised version
- E2 unknown may be thermal design power consumption
V representativePackaging interface SP2 LGA4094 (unchanged)
- representative of Jack64 core numbers
U representative32MB level 2 cache (64 × 512KB), 128MB level 3 cache
- G5 unknown may be a step-by-step version
20 / 14 representativesAcceleration frequency 2.0 GHz, reference frequency 1.4 GHz
This frequency is obviously too low. After all, it's engineering samples. It's common practice. The over-computed 64-core EPYC of the High Performance Computing Center (HLRS) in Stuttgart, Germany, has a frequency of 2.35 GHz.
Such U, dual-way is 128 core 256 threads, Intel hard glue heap out of the 96 core 192 threads were crushed down.