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The chip is also open source? Net red RISC-V, what is it?

via:博客园     time:2019/7/11 8:05:11     readed:834

Author: Jun jujube, Source: Fresh classroom (ID: xzclasscom)

A few days ago, Xiaozaojun introduced the open source base station O-RAN.

Today, Xiaozaojun wants to introduce you to an open source thing, that is, the redness of the semiconductor industry, which is called “open source chip” by many people, RISC-V.


Speaking of chips, since ZTE was embargoed by the US embargo, the attention of Chinese people to chips has been raised to an unprecedented height. It seems that overnight, everyone knows the importance of the chip, and realizes the serious consequences of “lack of core”.

This year, Huawei was targeted by the US government and included in the list of entities, which once again triggered nationwide attention and discussion on the independent research and development capabilities of chips.

Under the combined effect of internal and external factors, the state has strengthened its investment in the chip field, and more and more enterprises have begun to attach importance to investment in chip research and development.

And RISC-V, at this critical node, will likely play a very crucial role.

What exactly is RISC-V?

RISC-V, generally read as: risk five. V, is the Roman numeral 5.

Many people mentioned that RISC-V will say that it is an open source chip. Actually this statement is wrong. To be precise, RISC-V is an open source instruction set architecture based on the “Reduced Instruction Set (RISC)” principle.

Don't be afraid! I can explain it in person! ——

The instruction set, for the CPU, is a collection of program instructions between the software and the underlying hardware. The instruction set is stored inside the CPU, directs the CPU to perform operations, and helps the CPU run more efficiently.


CPU chip (central processing unit) inside the PC

The desktop computers or servers we use today are mainly CPUs from Intel and AMD. The instruction set used by this type of CPU belongs to the "CISC Complex Instruction Set". CISC is the Complex Instruction Set Computer.


A CPU-supported instruction set, there are many

The CPUs of earlier computers were based on the CISC architecture.

At that time, the compiler's technology was not very skillful. The program was written directly in machine code or combined language. In order to reduce the design time of the program, the program code of single instruction and complex operation was gradually developed. The designer simply writes down the simple instructions and hands them over to the CPU for execution.

However, it was later discovered that only about 20% of the instructions in the entire instruction set are often used, accounting for about 80% of the entire program; the remaining 80% of the instructions account for only 20% of the entire program. (Typical two-eighth principle)

So, in 1979, Professor David Patterson of the University of California, Berkeley proposedRISCThe idea is that hardware should concentrate on accelerating commonly used instructions, while more complex instructions use common instructions to combine.

RISC is the Reduced Instruction Set Computer, a reduced instruction set computer.

Simply put, CISC has a high processing power and is suitable for desktop computers and servers. But high performance also brings high power consumption problems.

RISC is a portable electronic product or IoT product for mobile phones, tablets, digital cameras, etc. by streamlining CISC instruction types, formats, and simplified addressing modes.


In the 1980s, ARM began to make its own chips based on the RISC architecture, and finally rose step by step, defeating Intel and becoming the king of mobile chips. Today, most mobile phone terminals and IoT device chips, including Huawei Kirin and Qualcomm, are based on ARM architecture.


Note that I am talking about ARM architecture, not ARM's chip products.

The business model of the ARM company is very special. What it does is the architectural design of the chip, which is equivalent to drawing engineering drawings, and then selling the drawings to major chip manufacturing companies, such as Huawei. Based on this original drawing, these companies modified and finally designed the chips they wanted and delivered them to the chip factory (such as TSMC) to produce them.

Of course, ARM drawings are not free. Not only is it not free, but it is very expensive.

According to online information, ARM's licensing fees range from hundreds of thousands of dollars to hundreds of millions of dollars. When a chip startup in France was interviewed by the media, they said that if they used the ARM architecture, they would have to pay a $15 million license fee. (This answer was later denied by ARM, anyway, it is not cheap anyway.)

Nowadays, with the vigorous development of 5G, Internet of Things, artificial intelligence and other technologies, more and more enterprises are beginning to produce and manufacture terminals and modules that serve various vertical industries.

This means that more and more companies are forced to accept the "exploitation" of ARM or other chip giants.

Fortunately, big companies say that they are handed over, but for many small and medium-sized enterprises and even start-ups, this is almost completely closing the door to progress.

At this time, some people stood up bravely.


In 2010, a research team at the University of California, Berkeley, was preparing to launch a new project. When selecting the instruction set for the new project, they found that the x86 instruction set was controlled by Intel. The license fee of the ARM instruction set was very expensive. MIPS, SPARC, and PowerPC also had intellectual property problems.

In this case, the research team decided to design a new instruction set from scratch.

In the eyes of outsiders, this is a daunting task. But in fact, Berkeley's research team only convened a team of four people, and in three months, completed the RISC-V instruction set development.

Although it seems very easy, it is actually a prerequisite. RISC-V is a V (Five) because it has been I, II, III, IV before.

It’s not someone else who is responsible for leading the development of these RISC instruction sets. It’s Berkeley.Professor David Patterson. Looking through this article, you will find that he is the true founder of the RISC instruction set. In that year, the groundbreaking paper that officially proposed the idea of ​​streamlining instruction set —— "Complete Instruction Set Computer Overview" was published jointly by him and another scholar named Ditzel.


Professor David Patterson, later won the Turing Award

It is because of the related technology precipitation that the Berkeley team can make RISC-V in the short term.


The first generation of RISC-I processors was made as early as 1981.

The RISC-V instruction set is very streamlined and flexible. Its first version contains less than 50 instructions and can be used to implement a processor with basic functions such as fixed-point arithmetic and privileged mode. If you need it, you can customize the new instructions according to your needs.

After all, colleges and universities are colleges and universities, and utilitarianism is not so heavy. Plus the research team itself does have no money to maintain it. So, after making the RISC-V instruction set, the research team decided to open it completely and use the BSD License open source protocol.

The BSD (Berkeley Software Distribution) open source agreement is a very liberal agreement, which can be said to be "do whatever you want". It allows users to modify and redistribute open source code, as well as commercial software distribution and sales based on open source code.

This means that anyone can design and develop chips based on the RISC-V instruction set and then sell the money without paying the license fee.

This is very embarrassing, and a large number of companies have begun to join the research and secondary development of RISC-V.

In just a few years, including Google, Huawei, IBM, Micron, NVIDIA, Qualcomm, Samsung, Western Digital and other commercial companies, as well as the University of California at Berkeley, Massachusetts Institute of Technology, Princeton University, ETH Zurich, Indian Institute of Technology, Academic institutions such as Lorenz National Laboratory, Singapore Nanyang Technological University and the Institute of Computing Technology of the Chinese Academy of Sciences have joined the RISC-V Foundation.

Currently, the RISC-V Foundation has a total of 235 member units including 18 Platinum members (data as of July 10, 2019). These member companies include semiconductor design and manufacturing companies, system integrators, equipment manufacturers, military companies, scientific research institutions, universities and other organizations, which is enough to show that the influence of RISC-V is expanding.


As mentioned earlier, RISC-V is very important for the chip industry in our country.

For a long time, the chip research and development in our country has been subject to people. If domestic enterprises or scientific research institutions can use the open source RISC-V to make chips with basic independent intellectual property rights, or cultivate the corresponding ecological environment, it will greatly benefit the Chinese semiconductor industry to make over-the-counter overturns.

Therefore, more than 20 domestic enterprises and institutions, including the Institute of Computing Technology of the Chinese Academy of Sciences, Huawei, and Alibaba Group, chose to join the RISC-V Foundation. Ali is also a Platinum member.

In July 2018, the Shanghai Economic and Trade Commission issued the first domestic policy to support RISC-V. In October, the China RISC-V Industry Alliance was established. In terms of products, Zhongtianwei and Huami Technology have released processors based on the RISC-V instruction set.


Huangshan No. 1 (Hua Mi) based on RISC-V, the first artificial intelligence chip in the global wearable field

Our neighbor India, the enthusiasm for RISC-V is even higher. In the past few years, processor-related projects funded by the Indian government have begun to move closer to RISC-V. RISC-V has become India's national instruction set.

The rapid development of RISC-V has put a lot of pressure on companies like ARM.

In June last year, ARM built a website with the domain name riscv-basics.com. The content of the content was “The Five Things to Consider Before Designing System Chips”, from cost, ecosystem, fragmentation risk, Security and design guarantees an attack on RISC-V.

RISC-V has a tit-for-tat, built a website with the domain arm-basics.com, and the six things to consider before designing the system chip (the five items listed in ARM) have been added. Community support), counterattack ARM.

A few days later, ARM's riscv-basics.com website quietly went offline.

Although RISC-V won in this short-lived "strike", the five aspects of ARM's questioning are not entirely unreasonable. Especially the fragmentation problem, as an open source technology, RISC-V is really difficult to circumvent.

(Fragmentation: Since RISC-V allows users to add new instructions at will, but as this trend continues, it is likely that many RISC-V architecture processors developed by many chip vendors will belong to the same RISC-V system, but The actual version of the application can not be adapted to the same version of the software.)

All in all, RISC-V can be seen as a viable young spoiler. It is unrealistic to hope that it will compete with traditional giants in a short period of time. However, it raises the banner of breaking the monopoly and injects fresh vitality into the boring industry ecology. It deserves to be praised by us and worth learning.

The fire of the stars can be pecked, and perhaps the spoiler can really become a leader in the future, not necessarily.

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