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Full of practical information: Toshiba talks about 5-Bit-per-Cell flash memory and shows off the first PCIe 4.0 enterprise SSD (figure)

via:cnBeta.COM     time:2019/8/26 10:45:24     readed:1498


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Toshiba is embracing PCIe 4.0 and a number of new storage technologies, including the new PCIe 4.0 NVMe solid state drive, the release of XL-Flash Storage Class Memory (SCM), 's native NVMe over fabrics (NVMe-oF Ethernet solid state drive, and so on. Even at the fair, Toshiba mentioned that the upcoming BiCS FLASH, includes five-tier unit (PLC) NAND development.

In Toshiba's keynote address, the company's spokesman discussed not only the company's XL-Flash technology, but also some of the interesting points of the future.

Toshiba said it planned to move from the fifth generation of BiCS Flash to the seventh generation. Every generation of product innovation conforms to the PCIe standard. Beginning with BiCS 5, it will soon be listed with PCIe 4.0, but the company has not yet provided a specific timetable. BiCS5 will have a higher bandwidth of 1,200 MT/s, while BiCS6 will reach 1,600 MT/s and BiCS7 will reach 2,000 MT/s.

At present, the company has embarked on the research work of Penta-level five-layer unit (PLC) NAND flash memory, and verified the five-bit per cell NAND by optimizing the current QLC NAND. The new flash memory provides a higher density, each unit can store 5 bits, the current QLC can only store 4 bits.

However, to do this, each cell needs to store 32 different voltage levels, and the main control of the solid-state hard disk needs to be able to read them accurately. With so many voltage levels and nanoscale, new technologies are challenging. In order to control more stringent thresholds, companies must develop additional processes that may be adapted to their current TLC and QLC to improve performance.

Compared with other types of flash memory, QLC runs slowly and has low durability. PLC has lower durability and slower performance. However, new NVMe protocol features, such as partitioned namespaces (ZNS), should help alleviate some problems. ZNS itself aims to reduce write amplification, media overconfiguration and internal controller DRAM usage. Of course, it can also improve throughput and reduce latency.

Toshiba has also developed new production processes that can increase the chip density of the next generation of BiCS FLASH in various forms. It basically divides the memory cell into two halves to expand the scale, while retaining the conventional 3D flash process. Toshiba is not yet sure if this method is entirely feasible.

XL-Flash details

At last year's International Flash Technology Summit, Toshiba officially announced XL-Flash. XL-Flash is Toshiba's counterpartSamsungLow Latency V-NAND (Z-NAND) andIntelOptane storage scheme. Because Optane storage is too expensive and Samsung Z-NAND is limited to its proprietary products, this is a new opportunity for Toshiba. It has designed a more cost-effective, lower latency storage solution for the company's customers, bridging the performance gap between DRAM and NAND.

Core Functions of XL-Flash

128 Gigabit (Gb) bare film(Can provide 2 chips, 4 chips, 8 chips package)

4KB page sizeTo achieve more efficient operation system read and write operations

16-plane architectureTo achieve more efficient parallelism

Fast page reading and programming time。 Toshiba says XL-FLASH provides read latency of less than 5 microseconds, about 10 times faster than existing TLCs.

Using Z-NAND design similar to Samsung, Toshiba's XL-Flash is a SLC NAND form, which has been optimized for the fastest response time. According to Toshiba's initial plan, it willSSDPersistent memory is used, but the company mentions non-volatile dual in-line memory modules (NVDIMM) that may be used to carry DRAM buses. Sample equipment has been completed and shipment is expected to start in September. Large-scale production is expected to start in 2020.

Toshiba is the first company to announce and publicly demonstrate the enterprise/data center PCIe 4.0 solid-state hard disk. The new CM6 series enterprise and CD6 series data center SSD are constructed with the latest 96-tier BiCS4 flash memory of the company. The sequential throughput is as high as 6.7 GB/s.

CD6 is built for cloud computing, content delivery network (CDN) and database applications, while CM6 is for cloud computing.HPC. Large data analysis, container and virtualization applications. Each has a new U.3 specification (SFF-TA-1001) factor that can be used for single-port (CD6) and single/dual-port (CM6) configurations. In addition, they support the latest NVMe 1.4 specification.

Last year Toshiba launched KumoScale, a software that separates high-performance NVMe SSDs from computing nodes and allows these SSDs to be shared and provided on network infrastructure as network connection resources.

Last year Toshiba launched NVMe-oF, which uses the software. Toshiba shows an Ethernet JBOF box with 24 Ethernet SSDs. Each SSD appears in the system and has a separate IP address, which can be accessed through ethernet. The production-ready prototype SSD uses Toshiba's 96L 3D NAND and uses Marvell 88SN2400 NVMe-oF SSD controller to create 25GB Ethernet link instead of PCIe channel.

NVMe-oF is a very interesting and useful technology. It aims to achieve low latency access through architecture, expose the bandwidth of the entire SSD to the network, and reduce the need for high PCIe channel allocation for storage deployment. Therefore, these valuable channels can be used for more important computing devices, such as GPUs and other acceleration cards, rather than local storage.

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