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A large number of RISC-V products began to go on the market at the end of the year, and the AIoT chip market began to seize the war.

via:博客园     time:2019/10/4 13:01:53     readed:859

Science and technology will never stop moving forward. We have passed the era of PC and mobile Internet, and are moving towards the era of AI and IoT. One of the important factors driving the progress of the times is the improvement of computing power. Of course, every era has its representative processor architecture. RISC-V instruction set architecture (ISA) has attracted worldwide attention in recent years. Many people believe that RISC-V will become the main player in the AIoT era and even the representative instruction set.

Lei Feng net (official account: Lei Feng net) learned that from the end of 2019, RISC-V-based products will continue to market one after another. So, how will RISC-V seize the AIoT market? can RISC-V really be the representative of the new era of ISA?


RISC-V Free is a misunderstanding, flexibility is the greatest advantage

Perhaps because of the industry's opinion on Arm's licensing fee, or simply because free products are more attractive, the architecture is simple, and the fully open source RISCV instruction set has attracted great attention once it is launched. Worldwide, including Western Data, Inverta, Google, QUALCOMM, Huawei, and Lenovo have joined the RISCV Foundation. Even with the strong support of the government, RISCV has become the national directive set of India.


At this point, some people equate open source instruction set with free, and regard free as the advantage of RISC-V. Lei Feng net has explicitly pointed out in the previous article that the RISC-V instruction set is free, but it does not mean that the RISC-V processor is free.Lin Zhiming, general manager of Jingxin Technology, also pointed out in an interview with Lei Feng that following BSD (Berkeley Software Distribution) can indeed use RISC-V instruction set for free to design products, but RISC-V 's CPU is not free, which is a misunderstanding.

Interestingly, this is a misunderstanding, but it is also a good opportunity to promote RISC-V.For example, Jingxin Technology has a RISC-V FreeStart project, which allows developers to use Jingxin's RISC-V N22 core, integrated development environment and so on for free, but the product based on RISC-V FreeStart project has to pay a certain amount of royalties when it comes to mass production. There is also technology in the core.


Arm has adopted a similar approach in the face of the hundreds of billions of dollars of the Internet of things market and powerful competitors. In 2015, Arm announced that developers can use Cortex-M0 's intellectual property rights for free use of Cortex-M0 's intellectual property rights for product design and sample development.

In a previous interview with Lei Feng, Dr. Fang Zhixi, chairman of the China Advisory Board of the RISC-V Foundation, said that RISC-V would make the low-end design completely open source free, and that Arm would also be able to make simple designs open source free for everyone to use. Companies that want to use RISC-V should still pay attention to the differentiation that RISC-V can achieve according to its application scenarios.

Differentiation, or flexibility, is indeed the advantage of RISC-V. Lin Zhiming said that when RISC-V appeared, it was also 11 years after Jingxin was founded, one is out of professional intuition, the other is because the concept of RISC-V is very close to the direction promoted by Jingxin, such as allowing developers to increase instruction sets, so we were very optimistic about RISC-V. from the beginning.

Fragmentation and ecological immaturity are purely attacking words

Even with flexible features, PPA (Power Perform Area) metrics cannot be bypassed for chips in order to gain market access.Lin Zhiming said that compared with the same level of Arm products, the PPA of our RISC-V IP's CPU can be increased by an average of 20%, and if we make a shallow addition, we can get a 60% to 80% increase.

Is this significant improvement due to the characteristics of the RISC-V instruction set or is it due to the accumulation of experience? Lin Zhiming believes that each accounts for half. On the one hand, RISC-V itself is relatively concise, the burden is smaller, and our compiler is doing better. In addition, Jingxin has been established for nearly 15 years, and our experience in assisting customers in mass production can also play a role.

However, for chips, success can only be achieved if they are recognized by customers. Among them, ecology is very important. Last year Arm set up a website to attack RISC-V, attacking RISC-V in terms of cost, ecosystem, fragmentation risk, security and design assurance.Speaking of Arm's attack, Lin Zhiming believed that it only served to embolden the attacker himself, and did not really suppress RISC-V. Moreover, attacking open source ecosystem now would not benefit itself, but would have a counterforce.

What is the development of RISC-V ecosystem and related tool chains? Lin Zhiming said that for those areas using RTOS, RISC-V has matured.More specifically, if you want to apply RISC-V to embedded systems, such as banknote detector, shared bicycle, electric vehicle instrument, drone flight control and so on, there is no problem. But if it is to be used in more areas, such as aerospace, it still needs to be developed.

Jingxin has made a lot of contributions to the construction of RISC-V tool chain and ecology, such as whether Jingxin is the leader of DSP working group or the co-leader of fast insertion working group, and the working group on instruction set and software is also actively participating. In particular, the 32-bit Linux of RISC-V is contributed by Jingxin.


As for fragmentation, Lin Zhiming said it was purely offensive. Specifically, the RISC-V instruction set is divided into basic instruction set and modular extension instruction.As long as the RISC-V foundation continues to keep his team, demanding that all vendors, and the CPU that claims RISC-V, must ensure that the basic instruction set is compatible with each other, there can be no so-called fragmentation. As for extension instructions, different manufacturers can choose whether to increase or not according to their own situation, which is also the reason why RISC-V has the flexibility.

Since different vendors can choose whether to use extension instructions or not, the extension instructions will not be compatible with each other, and whether to open source or not will be decided by the vendors themselves.

If you look at security again,Lin Zhiming pointed out that it must be emphasized that security is omni-directional. However, there are no security instructions in RISC-V 's standard instruction set, and the working group is still discussing and developing them.RISC-V also has many protection options before the security instructions in the standard instruction set are determined. Jingxin has a secure microprocessor product more than ten years ago. At present, we also cooperate with many security manufacturers.

You can use the physical non-clone function (that is, PUF,Physical Unclonable Function), which is a kind of

RISC-V needs computer transportation to become a representative instruction set in the era of AI and IoT.

So far, the progress of RISC-V technology itself and its ecological construction has been very clear. The next thing to pay attention to is the future development of RISC-V. In terms of product progress, Lin Zhiming said:RISC-V products will be put on the market in the second half of this year and early next year.

Lin Zhiming revealed that about 50% of the products using Jingxin RISC-V IP are related to AI and IoT, some of which are pure AI. Moreover, there are many products of edge computing, and there are also products used in data center and server.

Although RISC-V technology has obvious advantages, and some companies have introduced RISC-V instruction set processors, such as Pintou Brother, Wamier, Granz, etc., can RISC-V become a symbol of the times in the future? Lin Zhiming thinks it needs some luck.

Looking back on the already highly successful x86 and Arm, are Intel and Microsoft, Arm and Google working together and even bundling to build standardized platforms that have become the most successful processor instruction set architecture of the two ages with the help of the billions of shipments of PC and smartphone monomers.

At present, whether the Internet of things or AI can not achieve standardized platform. Well, before the arrival of the computer, RISC-V can enter the stock market, that is, based on RISC-V to design mobile phone processors, Lin Zhiming believes that this is the most qualified is Huawei. In addition, it is to cultivate emerging markets such as AI and IoT, at this time, the competition is who can provide better solutions.

As mentioned above, the flexibility of the RISC-V instruction set architecture allows developers to implement a lot of ideas in both AI and IoT. In addition, the power consumption of performance is also the key to win. Take mining (digital encrypted currency) as an example. At first, the miner used CPU to mine, then turned to GPU, and later even used mobile phone to mine, but in the end, ASIC won, because both CPU and GPU, would have many instruction sets that could not be used in this scenario, which could not be optimized. ASIC is efficient enough and consumes less power. RISC-V also has this advantage, which can provide appropriate computing power and has the advantage of low power consumption.


It is also worth noting that although they are all providers of RISC-V IP, there is also cooperation between Jingxin, Xinlai Technology and SiFive.'We are not pure competitors, but competitors, 'says Lin. Technically, we are cooperative and hope to strengthen the ecology of RISC-V through cooperation, but at the commercial level, if customers want to choose RISC-V IP, we are competitive.

Summary of Lei Feng net

RISC-V is the most concerned instruction set nowadays, especially in the context of vigorously developing self-research chips in China. Simple and completely open source RISC-V instruction set architecture is a good choice, and it is understandable that more attention has been paid to it. This upsurge also makes Arm nervous and attacks RISC-V. However, RISC-V's tool chain in the embedded field is ready. Moreover, as long as the RISC-V Foundation remains operational and guarantees the compatibility of the RISC-V processor's basic instruction set, fragmentation is more of an attack. In terms of security, there are no security instructions in RISC-V standard instruction set, but there are many ways to ensure the security of RISC-V processor.

As to whether RISC-V can become the representative instruction set architecture of the AI and IoT era, there is no obstacle to the technology itself, but Lin Zhiming believes it needs some computer transportation, deep bundling with giant companies, or finding PC and mobile-class products.

Undoubtedly, with the mass marketing of RISC-V products, the competition among x86, Arm and RISC-V is becoming fierce in the AIoT chip market.

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