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Intel unveils 7Nm GPU chip: new Xe architecture integrates HBM display memory

via:驱动之家     time:2019/11/21 0:06:39     readed:1360

At SC 19 supercomputing conference,Intel officially announced their Xe architecture GPU for high-performance computing)At the same time, it will also launch Intel's 7Nm technology. In 2021, it will be used for Aurora supercomputing, which Intel spent $5 billion to build for the U.S. Department of defense.

The Xe GPU architecture is a very flexible and extensible unified architecture, which can be divided into multiple micro architectures, so that it can be used in almost all computing and graphics fields, including 10 billion times of high-performance computing, deep learning and training, cloud services, multimedia editing, work stations, games, light and thin notebooks, portable devices, etc.

Specific to the Xe architecture for HPC,Its EU units can be greatly expanded to 1000And each cell is newly designed. The fp64 double precision floating-point computing power is 40 times of the current.

In the Xe HPC architecture, EU unit is connected to HBM high bandwidth video memory through xemf (Xe memory fabric) bus,Integration of large - capacity consistency cache at the same time. And supports ECC error correction and RAS at the most powerful level.

In encapsulation, emib is used to connect GPU and HBM, while foveros is used to interconnect Rambo cache, which is shared by multiple GPUs on the same mediation layer. Both will greatly improve bandwidth efficiency and density.


At the press conference, Intel's ppt failed to clearly show the internal structure of Ponte Vecchio GPU. Today, Raja koduri, Intel's chief architect and vice president in charge of high performance GPU project, released the internal structure of Ponte Vecchio chip,You can see that there are 8 sets of Xe computing cores on the left and right sidesAt present, it is only known that it is manufactured by 7Nm process, and the specific information in it is still not published.

In addition to the core of Xe computing, there are Rambo cache cache and HBM memory around, supported by the CXL bus and xemf bus developed by Intel for 10 billion times of computing, as well as technologies such as emib and foveros encapsulation. The technical content of Ponte Vecchio GPU is really high.


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