Samsung Foundry plans to unveil upgraded 3 - and 4-nanometer chip manufacturing processes at VLSI Symposium 2023 in June 2023, The event will be held in Kyoto, Japan, from June 11 to 16, 2023. At the chip industry event, the South Korean chipmaker will detail its second-generation 3-nanometer and fourth-generation 4-nanometer processes. The two new processes are important for Samsung semiconductors because they will help it reach more customers.
IT House notes that the 4-nanometer process used by Samsung Semiconductors has received a lot of criticism in the past because it is far less efficient than the 4-nanometer process used by Taiwan Semiconductor Manufacturing (TSMC) to make the Apple A16, Qualcomm Snapdragon 8 Gen 2, Mediatek Breguet 9000, and Nvidia RTX 4000 series Gpus, Samsung used the same process to make its Exynos 2200 and Snapdragon 8 Gen 1 chipsets.
Samsung Semiconductor's SF3 chip manufacturing process, which will use the 3-nanometer GAP technology, is an improved version of the SF3E process, which will be used to manufacture chips in the second half of 2022. The new process relies on Samsung's modified GAA (fully enclosed gate) transistor, which the company calls MBCFET (multi-bridge channel field-effect transistor). This node promises further optimization compared to the SF4 (second generation 4 nm), but the company has not directly compared it to its first generation 3 nm process. The SF3 is said to be 22% faster for the same power consumption, or 34% less power for the same clock speed and number of transistors, as well as 21% smaller logical area.
Typically, Samsung's first-generation chip-making process is not widely used, and subsequent generations are used by a variety of chip companies. Based on Samsung Semiconductor's track record, its second-generation 3-nanometer chip manufacturing technology is likely to be used by at least one major chip customer. There are rumors that the Exynos 2500 and Snapdragon 8 Gen 4 May use the SF3 process.
The company's fourth-generation 4nm process is designed for high-performance computing applications such as server cpus and Gpus, offering a 10% performance boost and 23% power reduction compared to the SF4 (second-generation 4nm). The new process will compete with TSMC's N4P (second generation 4 nm) and N4X (third generation 4 nm) nodes, which will be launched in 2024 and 2025, respectively. Samsung Semiconductor's SF4X is the company's first node aimed at high-performance computing in recent years, according to AnandTech.
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